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#FPGA PROJECTS ALTERA CYCLONE II HOW TO#
#FPGA PROJECTS ALTERA CYCLONE II CODE#

As shown in Figure 1.12, after completing the previous step, enter the detailed setting interface.

Note that the selection type is Verilog language type.

As shown in Figure 1.11, double-click ALTPLL and enter the name of the PLL module in the pop-up dialog box.

As shown in Figure 1.10, find the ALTPLL in the IP catalog option bar on the right side of the main interface.

The second step: the call of IP Core, the establishment and use of PLL module

Output signal is led 8 leds are defined by the multi-bit width form of led. The input signal of this experiment has 50 MHz system clock clk and reset signal rst_n. The first step: the establishment of the main program framework (interface design) module Led_shifting( Once the preparation is ready, start writing the program. Pay attention to the consistency of the program name and project name, and save it in the correct path (folder).įigure 1.9 Create a new project file (LED_shifting.v)

Click File > New or use the shortcut key Ctrl+N to pop up the dialog box shown in Figure 1.9, create a program file (Verilog HDL File) to write code.

Click Next to go to the next interface and select Finish to complete the project project.

Here use the EDA tool that comes with Quartus.

As shown in Figure 1.8, select the EDA tool.

Selecting Cyclone 10 LP in the Family, FBGA in the package, 484 in the Pin count, and 8 in the Core speed grage helps narrow down the selection and quickly find the target model.

As shown in Figure 1.7, select the correct FPGA chip model, the onboard chip model is 10CL040YF484C8G.

Since it is a new project, click Next to perform the next step.

As shown in Figure 1.6, you can directly add some files written in advance.

It is recommended that the path is easy to find and convenient for later viewing and calling.įigure 1.5 Name and define the path of the project file

As shown in Figure 1.5, select the correct project path.

You can also click File to create a new project in the toolbar, or press Ctrl+N to create a new project.

As shown in Figure 1.4, after opening Quartus, you can directly click New Project Wizard in the middle of the screen to create a new project.

The specific project establishment steps are shown in Figure 1.4 to 1.9.

#FPGA PROJECTS ALTERA CYCLONE II HOW TO#

When the FPGA outputs a low level of 0, a current flows through the LED, and it is turned on.įigure 1.3 Schematics of LED 1.3.3 Program Design 1.3.3.1 Start Programīefore writing a program, let’s briefly introduce the development environment we use and how to create a project. The LED module of this experiment board adopts 8 common anode LEDs, which are connected with Vcc 3.3V through 180 R resistors, and the cathodes are directly connected and controlled by the FPGA. The schematics of LED is shown in Figure 1.3. The physical picture of the onboard 8-bit LED is shown in Figure 1.2. The FII-PRA040 uses the LED lights in the red circle.įigure 1.1 Different kinds of LEDs 1.3.2 Hardware Design Up to now, there are many types of LED lights, as shown in Figure 1.1. LED (Light-Emitting Diode), is characterized by low operating current, high reliability and long life. After the last (highest position) LED is lit, the next time it returns to the first (lowest position) LED, the loop is achieved.End reset, LED lights from low to high (from right to left) in turn.Use all LEDS, all light up during reset.Observe the experiment result and summarize it.Combine hardware resources to perform FPGA pin assignment and implement actual program downloading.Master the design of the frequency divider to implemnet the runing LED.

#FPGA PROJECTS ALTERA CYCLONE II CODE#

Proficiency in the writing of Verilog HDL programs to develop a good code writing style.Practice to use Quartus II to create new projects and use system resources IP Core.Altera Risc-V FPGA Board Experiment 1 LED shifting 1.1 Experiment Objective